The present invention relates to a semiconductor integrated circuit using nonvolatile memory cells to store control information for defect relief, trimming of circuit characteristics or function switching with respect to a plurality of circuit modules, and a method of manufacturing a semiconductor integrated circuit with control information written into such nonvolatile memory cells. The present invention relates to, for example, a technology effective for application to a microcomputer or a system LSI equipped with a logic circuit and a RAM.
A technology for causing a nonvolatile memory cell like a flash memory cell to hold relief information or the like used for defect relief of an on-chip memory and a characteristic adjustment to a logic circuit has been described in Unexamined Patent Publication No. 2000-149588 (corresponding U.S. Pat. No. 2002/163840). According to it, relief information or the like for a defect of a RAM is stored in the flash memory in a semiconductor integrated circuit in which the RAM and the flash memory are implemented on a chip together with a CPU (Central Processing Unit). Further, the relief information or the like held in the flash memory is read into a general-purpose bus as part of an initializing operation at power-on or the like, and the read relief information or the like is loaded into a register inherent in the RAM or the like. The relief information or the like loaded into the register is supplied to a defective address determination circuit, a switching circuit for switching a defective address to a relief address, etc., in the corresponding RAM.